{"id":4201,"date":"2020-12-15T11:10:27","date_gmt":"2020-12-15T11:10:27","guid":{"rendered":"http:\/\/fastbitlab.com\/?p=4201"},"modified":"2022-11-18T14:48:12","modified_gmt":"2022-11-18T09:18:12","slug":"i2c-pull-up-resistance-rise-time-and-bus-capacitance-discussion","status":"publish","type":"post","link":"https:\/\/fastbitlab.com\/blog\/i2c-pull-up-resistance-rise-time-and-bus-capacitance-discussion\/","title":{"rendered":"STM32 I2C Lecture 23: I2C pull up resistance, rise time and bus capacitance discussion"},"content":{"rendered":"
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I2C pull up resistance, rise time and bus capacitance discussion<\/span><\/h1>\n
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Before doing the exercises on I2C, we have to cover some important concepts related to I2C communication. They are as follows:<\/span><\/p>\n

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  1. Calculation of the right pull-up resistance for the application.<\/span><\/li>\n
  2. Calculation of rise time.<\/span><\/li>\n
  3. Calculation of bus capacitance.<\/span><\/li>\n<\/ol>\n

    These are very important discussions, and it will help achieve successful communication between devices using the I2C protocol.<\/span><\/p>\n

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    Calculation of the right pull up resistance for the application<\/b>:<\/b><\/span><\/p>\n

    There are two equations in order to calculate the pull-up resistor, as shown in Figure 1.<\/span><\/p>\n

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    Figure 1. Formulas to calculate pull-up resistor.<\/span><\/figcaption><\/figure>\n

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    The first equation gives the minimum value of the pull-up resistance required for the application. The pull-up resistance minimum value is a function of the V<\/span>CC<\/span> or V<\/span>DD<\/span>, which is the main supply for the microcontroller, V<\/span>OL<\/span> (max)<\/span>, and I<\/span>OL<\/span>.<\/span><\/span><\/p>\n

    Basically,<\/span><\/p>\n

    R<\/span>P<\/span> (min) = V\/I<\/span><\/span><\/p>\n

    Where V<\/span>OL<\/span> means low-level output voltage. Ideally, V<\/span>OL<\/span> will be zero, the low-level output voltage is 0, and the high-level output voltage means V<\/span>CC<\/span>. But in I2C specification, voltage up to 0.4V is considered as low-level output voltage. <\/span><\/span><\/p>\n

    V<\/span>OL<\/span> value is given in the I2C specification. Look at Figure 2, here it is given that when V<\/span>DD<\/span> > 2, the low-level output voltage is equal to 0.4, and the I<\/span>OL<\/span> value can be considered as 3mA.<\/span><\/span><\/p>\n

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    Figure 2. Characteristics of the SDA and SCL I\/O stages.<\/span><\/figcaption><\/figure>\n

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    Now, substitute all these values into equation 1 of Figure 1 to calculate the minimum value of the pull-up resistors.<\/span><\/p>\n

    For example, let\u2019s consider the scenario (Figure 3) where the signal, either SDA or SCL, is going from high to low.<\/span><\/p>\n

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    Figure 3. Pulling the bus low with an open-drain interface.<\/span><\/figcaption><\/figure>\n

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    Consider that High is V<\/span>CC<\/span> and low is 0, and the V<\/span>OL<\/span> is somewhere near the 0. When SCL or SDA goes low, then the transistor in Figure 3 will conduct, and the current I<\/span>OL<\/span> flows through it. Therefore, the resistance of the R<\/span>PU<\/span> can be easily calculated using the formula:<\/span><\/span><\/p>\n

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    Solve this equation to get the minimum value of R<\/span>PU <\/span>that is pull-up register.<\/span><\/span><\/p>\n

    Use the second equation in Figure 1 to calculate the maximum value. The maximum pull-up resistance is the function of the maximum rise time (t<\/span>r<\/span>). This is a very important equation because it is a function of rise time and bus capacity. Where t<\/span>r<\/span> means rise time of both SDA and SCL signals and C<\/span>b<\/span> means capacitive load for each bus line.<\/span><\/span><\/p>\n

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    Rise time (tr):<\/span><\/strong><\/p>\n

    Consider the waveform in Figure 4. It can be either SDA or SCL. Now, look at the t<\/span>r<\/span>. It is the gap between 30% of the voltage level to 70% of the voltage level.<\/span><\/span><\/p>\n

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    Figure 4. Rise (tr) and Fall (tf) times.<\/span><\/figcaption><\/figure>\n

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    Therefore, the rise time or t<\/span>r<\/span> is defined as the amount of time taken by the rising edge to reach 70% amplitude from 30% amplitude for either SDA or SCL.<\/span><\/span><\/p>\n

    Ideally, the t<\/span>r<\/span> must be zero. If you consider the scenario in Figure 4, the signal is rising from low to high by taking a significant amount of time that time is denoted by t<\/span>r<\/span> or rise time. The rise time should not be high because if it is too high, it will cause a problem during I2C communication. The value of the pull-up resistance and the bus capacitance influence the t<\/span>r<\/span> timing. The t<\/span>r<\/span> is proportional to the RC time constant. Therefore, an increase in the value of pull-up resistance, and bus capacitance increases t<\/span>r<\/span>.<\/span><\/span><\/p>\n

    t<\/span>r<\/span> increasing means something is becoming a hurdle for SDA\/SCL line to rise to V<\/span>CC<\/span> level or someone is resisting the signal to rise to V<\/span>CC<\/span>. The hurdle is RC time constant. Where R is the value of the pull-up register, and C is bus capacitance. The hurdle faced by the signal to reach its 70% is a problem here. <\/span><\/span><\/p>\n

    I2C specification is very serious about this problem, and some maximum limit for t<\/span>r<\/span> is given to overcome this problem. The maximum limit of t<\/span>r<\/span> is 1000 nanoseconds for standard mode. While using standard mode, the t<\/span>r<\/span> of the signal (either SDA or SCL) should not be more than 1 microsecond or 1000 nanoseconds.<\/span><\/span><\/p>\n

    I2C specification cares about t<\/span>r<\/span> value and have to respect it while calculating the pull-up register value. A higher value of pull-up registers (weak pull-ups) increases the t<\/span>r<\/span> value (not acceptable if t<\/span>r<\/span> crosses max limit mentioned in the spec). The pull-up register with a very high value will prevent the signal from reaching 70% of the V<\/span>DD<\/span>, as shown in Figure 5.<\/span><\/span><\/p>\n

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    Figure 5. Problem with the higher value of pull-up registers.<\/span><\/figcaption><\/figure>\n

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    If it does not reach 70% of the V<\/span>DD<\/span> that is 2.3V in this case (Figure 5), then the signal is not considered as high, and the slave will receive some garbage values, or I2C communication will fail. If the signal fails to reach at least 70% of the V<\/span>CC<\/span> or V<\/span>DD<\/span> in the oscilloscope, as shown in Figure 5, you should conclude that the RC time constant is very high.<\/span><\/span><\/p>\n

    To solve this problem, either bring down the register or R-value or decrease the bus capacitance. You can also write R<\/span>p<\/span>C<\/span>b<\/span> instead of RC, where R<\/span>p<\/span> stands for pull-up resistance and C<\/span>b<\/span> is the bus capacitance. <\/span><\/span><\/p>\n

    The lower value of pull-up registers (strong pull-ups) decreases t<\/span>r<\/span> value, but they also lead to higher current consumption because when the resistance becomes very low, more current flows across the transistor resulting in more current consumption. <\/span><\/span><\/p>\n

    The higher power consumption is bad for power-aware or low power applications. That\u2019s why you have to select one of the values between R<\/span>P<\/span> (min)<\/span> and R<\/span>P<\/span> (max)<\/span> as the value of pull-up resistance. Here you will get the R<\/span>P<\/span> (min)<\/span> and R<\/span>P<\/span> (max)<\/span> values by solving the equations in Figure 1.<\/span><\/span><\/p>\n

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    Bus capacitance (C<\/b>b<\/b>)<\/b>:<\/b><\/span><\/p>\n

    Capacitance means that the voltage level on the signal line (data or clock) cannot change instantaneously.<\/span><\/span><\/p>\n

    For example, consider the circuit or bus in Figure 6. There we have SCL and SDA line and connected 4 devices. Even though you don\u2019t connect any capacitor in the circuit, the accidental capacitor called parasitic capacitor resists the flow and becomes a hurdle for the signal to rise from zero to a high state. So, while calculating the pull-up resistance, the value of the bus capacitance also must be taken into account, as in the case of R<\/span>P<\/span> (max)<\/span> calculation.<\/span><\/span><\/p>\n

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    Figure 6. I2C bus capacitance.<\/span><\/figcaption><\/figure>\n

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