{"id":4490,"date":"2020-12-23T04:48:10","date_gmt":"2020-12-23T04:48:10","guid":{"rendered":"http:\/\/fastbitlab.com\/?p=4490"},"modified":"2023-09-07T15:22:55","modified_gmt":"2023-09-07T09:52:55","slug":"stm32-i2c-lecture-38-i2c-irq-interrupt-discussion","status":"publish","type":"post","link":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-38-i2c-irq-interrupt-discussion\/","title":{"rendered":"STM32 I2C Lecture 38 : I2C IRQ and interrupt discussion"},"content":{"rendered":"<div class=\"boldgrid-section\" style=\"background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"container\">\n<div class=\"row\" style=\"padding-top: 50px; padding-bottom: 50px; background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"col-md-1 col-sm-12 col-xs-12 col-lg-1\">\n<p>&nbsp;<\/p>\n<\/div>\n<div class=\"col-md-10 col-sm-12 col-xs-12 col-lg-10\">\n<h1 class=\"\" style=\"text-align: center; border-width: 0px; font-size: 35px; line-height: 55px;\"><span style=\"color: #000080;\">I2C IRQ and interrupt discussion<\/span><\/h1>\n<div class=\"row bg-editor-hr-wrap\"><\/div>\n<div class=\"row bg-editor-hr-wrap\" style=\"border-width: 0px; margin-top: -25px;\">\n<div class=\"col-lg-12 col-md-12 col-xs-12 col-sm-12\">\n<div>\n<div class=\"bg-hr bg-hr-10\" style=\"border-style: solid; border-width: 0px 0px 3px; color: rgba(11, 34, 151, 0.9);\"><\/div>\n<p>&nbsp;<\/p>\n<\/div>\n<\/div>\n<\/div>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">In this article, let\u2019s discuss the I2C interrupts and try to develop the non-blocking flavors of the APIs (MasterReceiveData and MasterSendData) discussed in the I2C transactions. <\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Now let\u2019s understand the IRQ numbers of the I2C and how exactly the I2C peripheral interrupts the processor.<\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Remember that in all the cases shown in Figure 1, the I2C peripheral can interrupt the processor.&nbsp;<\/span><\/p>\n<figure id=\"attachment_4492\" aria-describedby=\"caption-attachment-4492\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img fetchpriority=\"high\" decoding=\"async\" class=\"wp-image-4492\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-1-25.png\" alt=\"I2C IRQ and interrupt discussion\" width=\"744\" height=\"499\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25.png 1233w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-300x201.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-768x515.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-1024x687.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-600x402.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-120x80.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-500x335.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-200x134.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-400x268.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-800x537.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-25-1200x805.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4492\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 1. I2C interrupt requests.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">You are already familiar with some of the flags in Figure 1 that may be a start bit indication, address sent flag (or ADDR), stop flag, TXE flag, and BTF, etc. There are lots of errors that may occur during the I2C communication, as shown in Figure 1. <\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">They are bus error, arbitration loss, acknowledgement failure, overrun or underrun, PEC error that is nothing but a mismatch of the CRC if the CRC feature is used, a timeout, etc. All these events have the capacity to interrupt the processor. <\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Whenever these events (events in Figure 1) happen, the corresponding flag in the status register will be set. Setting up those flags can interrupt the processor only if the control bit corresponding to that flag is enabled. Otherwise, it will not cause any interruption to the processor. Therefore, the control bits in Figure 1 are given to achieve the interruption.<\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">In the polling mode APIs, these control bits are not enabled since the APIs are polling based. Instead, we polled for the flags and then took the decision depending upon the status of the flags.&nbsp;<\/span><\/p>\n<p>&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 20px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"color: #000080;\"><b>Note<\/b><b>:<\/b><\/span><\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Remember that if you want interrupt for SB, ADDR, ADD10, STOPF, and BTF events, then the control bit ITEVFEN must be enabled in the control register.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">If you want interrupt for Receive buffer not empty and transmit buffer empty events, then the control bits ITEVFEN and ITBUFEN must be enabled in the control register.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">If you want interrupt for any of the error events shown in Figure 1, then the control bit ITERREN must be enabled in the control register.<\/span><\/li>\n<\/ul>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Now let\u2019s understand how the I2C peripheral interrupts the processor. Figure 2 shows the interrupt mapping diagram of the I2C peripheral.<\/span><\/p>\n<figure id=\"attachment_4493\" aria-describedby=\"caption-attachment-4493\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\" wp-image-4493\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-2-23.png\" alt=\"\" width=\"744\" height=\"499\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23.png 1221w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-300x201.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-768x515.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-1024x687.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-600x402.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-120x80.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-500x335.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-200x134.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-400x268.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-800x537.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-23-1200x805.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4493\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 2. Interrupt mapping diagram of the I2C peripheral.<\/span><\/figcaption><\/figure>\n<p>&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Let\u2019s assume the I2C peripheral in Figure 2 as the I2C1 peripheral. In Figure 2, you can see two IRQ lines, which are going from the I2C peripheral to the processor.<\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Figure 3 clearly illustrates that the two IRQ lines are going from the I2C1 peripheral and hitting the processor. The IRQ lines are connected to the NVIC of the processor.<\/span><\/p>\n<figure id=\"attachment_4494\" aria-describedby=\"caption-attachment-4494\" style=\"width: 743px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\" wp-image-4494\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-3-23.png\" alt=\"\" width=\"743\" height=\"315\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23.png 1859w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-300x127.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-768x326.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-1024x435.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-600x255.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-120x51.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-500x212.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-940x400.png 940w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-200x85.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-400x170.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-800x340.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-23-1200x509.png 1200w\" sizes=\"(max-width: 743px) 100vw, 743px\" \/><figcaption id=\"caption-attachment-4494\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 3. I2C1 interrupts.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">If you consider I2C1 peripheral, then the first line is called I2C1_EV_IRQ_LINE. Interrupts generated by all the events marked in Figure 4 are sent over I2C1_EV_IRQ_LINE connected to the IRQ number 31 in the NVIC. The remaining events in Figure 4 deliver the interrupt to the processor over the I2C1_ER_IRQ_LINE line, which is connected to IRQ number 32.<\/span><\/p>\n<figure id=\"attachment_4495\" aria-describedby=\"caption-attachment-4495\" style=\"width: 745px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4495\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-4-19.png\" alt=\"I2C IRQ and interrupt discussion\" width=\"745\" height=\"316\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19.png 1859w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-300x127.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-768x326.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-1024x435.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-600x255.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-120x51.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-500x212.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-940x400.png 940w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-200x85.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-400x170.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-800x340.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-19-1200x509.png 1200w\" sizes=\"(max-width: 745px) 100vw, 745px\" \/><figcaption id=\"caption-attachment-4495\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 4. I2C1 interrupts.<\/span><\/figcaption><\/figure>\n<p>&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Since the logical gate in Figure 3 is an AND gate, the control bits connected to the gate must be enabled to deliver the interrupts to the processor.<\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Figure 5 shows how different I2C peripherals deliver their interrupts to the processor.<\/span><\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">I2C1 delivers interrupt on 31 and 32 IRQ numbers.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">I2C2 delivers interrupt on 33 and 34 IRQ numbers.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">I2C3 delivers interrupt on IRQ numbers 79 and 80.<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4496\" aria-describedby=\"caption-attachment-4496\" style=\"width: 745px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4496\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-5-15.png\" alt=\"I2C IRQ and interrupt discussion\" width=\"745\" height=\"274\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15.png 1671w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-300x110.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-768x283.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-1024x377.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-600x221.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-120x44.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-500x184.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-200x74.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-400x147.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-800x294.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-15-1200x442.png 1200w\" sizes=\"(max-width: 745px) 100vw, 745px\" \/><figcaption id=\"caption-attachment-4496\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 5. I2C interrupting the processor.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">IRQ numbers are specific to MCUs, and you can get that details from the vector table of your RM (Figure 6).<\/span><\/p>\n<figure id=\"attachment_4497\" aria-describedby=\"caption-attachment-4497\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4497\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-6-15.png\" alt=\"I2C IRQ and interrupt discussion\" width=\"744\" height=\"399\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15.png 1539w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-300x161.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-768x412.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-1024x549.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-600x322.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-500x268.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-800x429.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-15-1200x643.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4497\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 6. Vector table.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"color: #000000;\">In the following article, let&#8217;s see<\/span><span style=\"color: #ff6600;\"><a style=\"color: #ff6600; text-decoration: underline;\" href=\"http:\/\/fastbitlab.com\/stm32-i2c-lecture-39-i2c-errors-and-importance-of-busy-flag\/\" target=\"_blank\" rel=\"noopener\"> I2C errors and importance of BUSY flag<\/a><\/span>.<\/p>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: Roboto; font-weight: 400; font-size: 20px; line-height: 30px;\" data-font-family=\"Roboto\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"color: #000080;\"><b>FastBit Embedded Brain Academy Courses<\/b><\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-size: 17px;\"><span style=\"color: #000000;\">Click here:<\/span>&nbsp;<span style=\"color: #0000ff;\"><a style=\"color: #0000ff; text-decoration: underline;\" href=\"http:\/\/fastbitlab.com\/course1\" target=\"_blank\" rel=\"noopener\">https:\/\/fastbitlab.com\/course1<\/a><\/span><\/p>\n<div class=\"mceTemp\"><\/div>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>&nbsp; I2C IRQ and interrupt discussion &nbsp; In this article, let\u2019s discuss the I2C interrupts and try to develop the non-blocking flavors of the APIs (MasterReceiveData and MasterSendData) discussed in the I2C transactions. Now let\u2019s understand the IRQ numbers of the I2C and how exactly the I2C peripheral interrupts the processor. Remember that in all [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":4492,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"ocean_post_layout":"","ocean_both_sidebars_style":"","ocean_both_sidebars_content_width":0,"ocean_both_sidebars_sidebars_width":0,"ocean_sidebar":"0","ocean_second_sidebar":"0","ocean_disable_margins":"enable","ocean_add_body_class":"","ocean_shortcode_before_top_bar":"","ocean_shortcode_after_top_bar":"","ocean_shortcode_before_header":"","ocean_shortcode_after_header":"","ocean_has_shortcode":"","ocean_shortcode_after_title":"","ocean_shortcode_before_footer_widgets":"","ocean_shortcode_after_footer_widgets":"","ocean_shortcode_before_footer_bottom":"","ocean_shortcode_after_footer_bottom":"","ocean_display_top_bar":"default","ocean_display_header":"default","ocean_header_style":"","ocean_center_header_left_menu":"0","ocean_custom_header_template":"0","ocean_custom_logo":0,"ocean_custom_retina_logo":0,"ocean_custom_logo_max_width":0,"ocean_custom_logo_tablet_max_width":0,"ocean_custom_logo_mobile_max_width":0,"ocean_custom_logo_max_height":0,"ocean_custom_logo_tablet_max_height":0,"ocean_custom_logo_mobile_max_height":0,"ocean_header_custom_menu":"0","ocean_menu_typo_font_family":"0","ocean_menu_typo_font_subset":"","ocean_menu_typo_font_size":0,"ocean_menu_typo_font_size_tablet":0,"ocean_menu_typo_font_size_mobile":0,"ocean_menu_typo_font_size_unit":"px","ocean_menu_typo_font_weight":"","ocean_menu_typo_font_weight_tablet":"","ocean_menu_typo_font_weight_mobile":"","ocean_menu_typo_transform":"","ocean_menu_typo_transform_tablet":"","ocean_menu_typo_transform_mobile":"","ocean_menu_typo_line_height":0,"ocean_menu_typo_line_height_tablet":0,"ocean_menu_typo_line_height_mobile":0,"ocean_menu_typo_line_height_unit":"","ocean_menu_typo_spacing":0,"ocean_menu_typo_spacing_tablet":0,"ocean_menu_typo_spacing_mobile":0,"ocean_menu_typo_spacing_unit":"","ocean_menu_link_color":"","ocean_menu_link_color_hover":"","ocean_menu_link_color_active":"","ocean_menu_link_background":"","ocean_menu_link_hover_background":"","ocean_menu_link_active_background":"","ocean_menu_social_links_bg":"","ocean_menu_social_hover_links_bg":"","ocean_menu_social_links_color":"","ocean_menu_social_hover_links_color":"","ocean_disable_title":"default","ocean_disable_heading":"default","ocean_post_title":"","ocean_post_subheading":"","ocean_post_title_style":"","ocean_post_title_background_color":"","ocean_post_title_background":0,"ocean_post_title_bg_image_position":"","ocean_post_title_bg_image_attachment":"","ocean_post_title_bg_image_repeat":"","ocean_post_title_bg_image_size":"","ocean_post_title_height":0,"ocean_post_title_bg_overlay":0.5,"ocean_post_title_bg_overlay_color":"","ocean_disable_breadcrumbs":"default","ocean_breadcrumbs_color":"","ocean_breadcrumbs_separator_color":"","ocean_breadcrumbs_links_color":"","ocean_breadcrumbs_links_hover_color":"","ocean_display_footer_widgets":"default","ocean_display_footer_bottom":"default","ocean_custom_footer_template":"0","ocean_post_oembed":"","ocean_post_self_hosted_media":"","ocean_post_video_embed":"","ocean_link_format":"","ocean_link_format_target":"self","ocean_quote_format":"","ocean_quote_format_link":"post","ocean_gallery_link_images":"off","ocean_gallery_id":[],"footnotes":""},"categories":[8],"tags":[23],"class_list":["post-4490","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-blog","tag-stm32-i2c-lectures","entry","has-media"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>I2C Interrupts: Non-blocking APIs and IRQs<\/title>\n<meta name=\"description\" content=\"I2C IRQ and interrupt discussion. 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