{"id":4564,"date":"2020-12-29T04:57:11","date_gmt":"2020-12-29T04:57:11","guid":{"rendered":"http:\/\/fastbitlab.com\/?p=4564"},"modified":"2022-11-22T16:33:03","modified_gmt":"2022-11-22T11:03:03","slug":"stm32-i2c-lecture-44-i2c-irq-handler-implementation-part-1","status":"publish","type":"post","link":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-44-i2c-irq-handler-implementation-part-1\/","title":{"rendered":"STM32 I2C Lecture 44: I2C IRQ handler implementation Part 1"},"content":{"rendered":"<div class=\"boldgrid-section\" style=\"background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"container\">\n<div class=\"row\" style=\"padding-top: 50px; padding-bottom: 50px; background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"col-md-1 col-sm-12 col-xs-12 col-lg-1\">\n<p class=\"\">&nbsp;<\/p>\n<\/div>\n<div class=\"col-md-10 col-sm-12 col-xs-12 col-lg-10\">\n<h1 class=\"\" style=\"text-align: center; font-size: 33px; border-width: 0px; line-height: 54px;\"><span style=\"color: #000080;\">I2C IRQ handler Implementation Part 1<\/span><\/h1>\n<div class=\"row bg-editor-hr-wrap color-4-text-contrast color4-background-color\" style=\"border-width: 0px; margin-top: -25px;\">\n<div class=\"col-lg-12 col-md-12 col-xs-12 col-sm-12\">\n<div>\n<p>&nbsp;<\/p>\n<div class=\"bg-hr bg-hr-10\" style=\"border-style: solid; border-width: 0px 0px 3px; color: rgba(11, 34, 151, 0.9);\"><\/div>\n<p>&nbsp;<\/p>\n<\/div>\n<\/div>\n<\/div>\n<div class=\"row bg-editor-hr-wrap\">\n<hr>\n<\/div>\n<div class=\"mceTemp\"><\/div>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">In this article, let\u2019s discuss I2C ISR handling. We have to implement two ISRs that is ISR1 and ISR2, as shown in Figure 1.<\/span><\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"color: #000000;\"><strong>ISR1<\/strong><span style=\"font-weight: 400;\">: It is the interrupt handling for interrupts generated by I2C events. It can be named as I2C_EV_IRQHandling API.<\/span><\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"color: #000000;\"><strong>ISR2<\/strong><span style=\"font-weight: 400;\">: It is the interrupt handling for interrupts generated by I2C errors. It can be named as I2C_ER_IRQHandling API.<\/span><\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4566\" aria-describedby=\"caption-attachment-4566\" style=\"width: 746px\" class=\"wp-caption aligncenter\"><img fetchpriority=\"high\" decoding=\"async\" class=\" wp-image-4566\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-1-31.png\" alt=\"\" width=\"746\" height=\"235\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31.png 1725w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-300x94.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-768x242.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-1024x322.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-600x189.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-120x38.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-500x157.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-200x63.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-400x126.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-800x252.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-31-1200x378.png 1200w\" sizes=\"(max-width: 746px) 100vw, 746px\" \/><figcaption id=\"caption-attachment-4566\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 1. I2C ISR handling.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 23px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"text-decoration: underline; color: #000080;\"><b>Steps for implementation:<\/b><\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">1. Go to the I2C_driver.h file of the project and create two more APIs, as shown in Figure 2. Both the APIs take only one parameter that is a handle.<\/span><\/p>\n<figure id=\"attachment_4567\" aria-describedby=\"caption-attachment-4567\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\" wp-image-4567\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-2-27.png\" alt=\"\" width=\"744\" height=\"398\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27.png 1917w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-768x411.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-1024x548.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-600x321.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-800x428.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-27-1200x642.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4567\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 2. Prototype for I2C_EV_IRQHandling and I2C_ER_IRQHandling APIs.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">2. Copy the prototype of both APIs and paste it at the end of the I2C_driver.c file, as shown in Figure 3.<\/span><\/p>\n<figure id=\"attachment_4568\" aria-describedby=\"caption-attachment-4568\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\" wp-image-4568\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-3-27.png\" alt=\"\" width=\"744\" height=\"396\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-768x409.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-1024x545.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-600x319.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-500x266.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-200x106.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-800x426.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-27-1200x638.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4568\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 3. I2C_EV_IRQHandling and I2C_ER_IRQHandling APIs in I2C_driver.c file.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">3. Implement the I2C_EV_IRQHandling API: This API is implemented according to a couple of comments given in Figure 4.<\/span><\/p>\n<figure id=\"attachment_4569\" aria-describedby=\"caption-attachment-4569\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4569\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-4-23.png\" alt=\"\" width=\"744\" height=\"397\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-768x409.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-1024x546.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-800x426.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-23-1200x640.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4569\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 4. Comments for implementing I2C_EV_IRQHandling API.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">I2C event interrupt may happen for various reasons. All the events in Figure 5 have the capacity to generate I2C event interrupt.<\/span><\/p>\n<figure id=\"attachment_4570\" aria-describedby=\"caption-attachment-4570\" style=\"width: 745px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4570\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-5-18.png\" alt=\"\" width=\"745\" height=\"313\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18.png 1839w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-300x126.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-768x323.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-1024x430.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-600x252.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-120x50.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-500x210.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-200x84.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-400x168.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-800x336.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-18-1200x504.png 1200w\" sizes=\"(max-width: 745px) 100vw, 745px\" \/><figcaption id=\"caption-attachment-4570\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 5. Events that have capacity to generate I2C event interrupt.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"font-size: 17px; border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Some of the reasons for the occurrence of the I2C event interrupt are as follows (Figure 6):<\/span><\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">SB<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">ADDR<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">BTF<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">STOP<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">RXNE<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">TXE<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4571\" aria-describedby=\"caption-attachment-4571\" style=\"width: 745px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4571\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-6-18.png\" alt=\"\" width=\"745\" height=\"356\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18.png 1517w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-300x143.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-768x367.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-1024x489.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-600x287.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-120x57.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-500x239.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-200x96.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-400x191.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-800x382.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-18-1200x574.png 1200w\" sizes=\"(max-width: 745px) 100vw, 745px\" \/><figcaption id=\"caption-attachment-4571\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 6. Reasons for the occurrence of the I2C event interrupt.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">In the program, first, decode the reasons for the occurrence of the I2C event interrupt. The handle for the various events causing I2C event interrupt is as follows:<\/span><\/p>\n<ol class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Handle for interrupt generated by SB event (Figure 7):<\/span>\n<ol>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Confirm whether the SB flag is set or not.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Create a couple of temporary variables, say temp1, temp2, and temp3.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Remember that the SB event interrupt will happen only if the ITEVFEN control bit is enabled. So, first, make sure that whether the control bit ITEVFEN is set or not. To find out the state of the ITEVFEN bit, you have to read the control register 2. The state of this bit is stored in a temp1 variable by using temp1= pI2CHandle-&gt;pI2Cx-&gt;CR2 &amp; (1 &lt;&lt; I2C_CR2_ITEVFEN) statement, as shown in Figure 7.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Check for the state of ITBUFEN using pI2CHandle-&gt;pI2Cx-&gt;CR2 &amp; (1 &lt;&lt; ITBUFEN) statement.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Refer to the status register to check whether the SB bit is set or not. The value of the SB bit is stored in the variable temp3 using pI2CHandle-&gt;pI2Cx-&gt;SR1 &amp; (1 &lt;&lt; I2C_SR1_SB) statement.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">If both the temp1 and temp3 values are TRUE, then only the SB flag is set. Otherwise, the SB is not set, and the I2C event interrupt is happened because of some other reasons.<\/span><\/li>\n<\/ol>\n<\/li>\n<\/ol>\n<figure id=\"attachment_4572\" aria-describedby=\"caption-attachment-4572\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4572\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-7-12.png\" alt=\"\" width=\"744\" height=\"397\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12.png 1917w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-768x409.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-1024x545.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-500x266.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-800x426.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-12-1200x639.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4572\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 7. Handle for interrupt generated by SB event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">2. Handle for interrupt generated by ADDR event: Code is similar to the SB event, but the difference is you have to replace the SB with ADDR, as shown in Figure 8.<\/span><\/p>\n<figure id=\"attachment_4573\" aria-describedby=\"caption-attachment-4573\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4573\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-8-10.png\" alt=\"\" width=\"744\" height=\"399\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10.png 1915w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-300x161.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-768x411.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-1024x548.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-600x321.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-500x268.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-800x428.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-10-1200x642.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4573\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 8. Handle for interrupt generated by ADDR event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">3. Handle for interrupt generated by BTF (Byte Transfer Finished) event is shown in Figure 9.<\/span><\/p>\n<figure id=\"attachment_4574\" aria-describedby=\"caption-attachment-4574\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4574\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-9-9.png\" alt=\"\" width=\"744\" height=\"398\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-768x410.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-1024x547.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-800x427.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-9-9-1200x641.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4574\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 9. Handle for interrupt generated by BTF event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">4. Handle for interrupt generated by STOPF event is as shown in Figure 10.<\/span><\/p>\n<figure id=\"attachment_4575\" aria-describedby=\"caption-attachment-4575\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4575\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-10-7.png\" alt=\"\" width=\"744\" height=\"397\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7.png 1917w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-768x410.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-1024x546.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-800x427.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-10-7-1200x640.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4575\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 10. Handle for interrupt generated by STOPF event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">5. Handle for interrupt generated by TXE event:<\/span><\/p>\n<ol class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Confirm whether the TXE flag is set or not.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"2\"><span style=\"font-weight: 400; color: #000000;\">Remember that the TXE event interrupt will happen only if both ITEVFEN and ITBUFEN control bits are enabled. Since it is necessary to check both control bits, the code should be modified, as shown in Figure 11.<\/span><\/li>\n<\/ol>\n<figure id=\"attachment_4576\" aria-describedby=\"caption-attachment-4576\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4576\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-11-6.png\" alt=\"\" width=\"744\" height=\"397\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-768x409.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-1024x546.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-800x426.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-11-6-1200x640.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4576\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 11. Handle for interrupt generated by TXE event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">6. Handle for interrupt generated by RXNE event: Code is similar to the TXE event, but the difference is you have to replace the TXE with RXNE, as shown in Figure 12.<\/span><\/p>\n<figure id=\"attachment_4577\" aria-describedby=\"caption-attachment-4577\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\" wp-image-4577\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-12-6.png\" alt=\"\" width=\"744\" height=\"398\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-768x410.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-1024x547.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-800x427.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-12-6-1200x641.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4577\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 12. Handle for interrupt generated by RXNE event.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Whenever an I2C event interrupt happens, the I2C_EV_IRQHandling function will get executed, where the reasons for the occurrence of the I2C event interrupt are decoded.<\/span><\/p>\n<p class=\"\">&nbsp; &nbsp;<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>&nbsp; I2C IRQ handler Implementation Part 1 &nbsp; &nbsp; In this article, let\u2019s discuss I2C ISR handling. We have to implement two ISRs that is ISR1 and ISR2, as shown in Figure 1. ISR1: It is the interrupt handling for interrupts generated by I2C events. It can be named as I2C_EV_IRQHandling API. ISR2: It is [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":4566,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"ocean_post_layout":"","ocean_both_sidebars_style":"","ocean_both_sidebars_content_width":0,"ocean_both_sidebars_sidebars_width":0,"ocean_sidebar":"0","ocean_second_sidebar":"0","ocean_disable_margins":"enable","ocean_add_body_class":"","ocean_shortcode_before_top_bar":"","ocean_shortcode_after_top_bar":"","ocean_shortcode_before_header":"","ocean_shortcode_after_header":"","ocean_has_shortcode":"","ocean_shortcode_after_title":"","ocean_shortcode_before_footer_widgets":"","ocean_shortcode_after_footer_widgets":"","ocean_shortcode_before_footer_bottom":"","ocean_shortcode_after_footer_bottom":"","ocean_display_top_bar":"default","ocean_display_header":"default","ocean_header_style":"","ocean_center_header_left_menu":"0","ocean_custom_header_template":"0","ocean_custom_logo":0,"ocean_custom_retina_logo":0,"ocean_custom_logo_max_width":0,"ocean_custom_logo_tablet_max_width":0,"ocean_custom_logo_mobile_max_width":0,"ocean_custom_logo_max_height":0,"ocean_custom_logo_tablet_max_height":0,"ocean_custom_logo_mobile_max_height":0,"ocean_header_custom_menu":"0","ocean_menu_typo_font_family":"0","ocean_menu_typo_font_subset":"","ocean_menu_typo_font_size":0,"ocean_menu_typo_font_size_tablet":0,"ocean_menu_typo_font_size_mobile":0,"ocean_menu_typo_font_size_unit":"px","ocean_menu_typo_font_weight":"","ocean_menu_typo_font_weight_tablet":"","ocean_menu_typo_font_weight_mobile":"","ocean_menu_typo_transform":"","ocean_menu_typo_transform_tablet":"","ocean_menu_typo_transform_mobile":"","ocean_menu_typo_line_height":0,"ocean_menu_typo_line_height_tablet":0,"ocean_menu_typo_line_height_mobile":0,"ocean_menu_typo_line_height_unit":"","ocean_menu_typo_spacing":0,"ocean_menu_typo_spacing_tablet":0,"ocean_menu_typo_spacing_mobile":0,"ocean_menu_typo_spacing_unit":"","ocean_menu_link_color":"","ocean_menu_link_color_hover":"","ocean_menu_link_color_active":"","ocean_menu_link_background":"","ocean_menu_link_hover_background":"","ocean_menu_link_active_background":"","ocean_menu_social_links_bg":"","ocean_menu_social_hover_links_bg":"","ocean_menu_social_links_color":"","ocean_menu_social_hover_links_color":"","ocean_disable_title":"default","ocean_disable_heading":"default","ocean_post_title":"","ocean_post_subheading":"","ocean_post_title_style":"","ocean_post_title_background_color":"","ocean_post_title_background":0,"ocean_post_title_bg_image_position":"","ocean_post_title_bg_image_attachment":"","ocean_post_title_bg_image_repeat":"","ocean_post_title_bg_image_size":"","ocean_post_title_height":0,"ocean_post_title_bg_overlay":0.5,"ocean_post_title_bg_overlay_color":"","ocean_disable_breadcrumbs":"default","ocean_breadcrumbs_color":"","ocean_breadcrumbs_separator_color":"","ocean_breadcrumbs_links_color":"","ocean_breadcrumbs_links_hover_color":"","ocean_display_footer_widgets":"default","ocean_display_footer_bottom":"default","ocean_custom_footer_template":"0","ocean_post_oembed":"","ocean_post_self_hosted_media":"","ocean_post_video_embed":"","ocean_link_format":"","ocean_link_format_target":"self","ocean_quote_format":"","ocean_quote_format_link":"post","ocean_gallery_link_images":"off","ocean_gallery_id":[],"footnotes":""},"categories":[8],"tags":[23],"class_list":["post-4564","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-blog","tag-stm32-i2c-lectures","entry","has-media"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>STM32 I2C Lecture 44: I2C IRQ handler implementation Part 1<\/title>\n<meta name=\"description\" content=\"I2C IRQ handler implementation Part 1,In this article, let\u2019s discuss I2C ISR handling. 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