{"id":4651,"date":"2020-12-31T04:07:56","date_gmt":"2020-12-31T04:07:56","guid":{"rendered":"http:\/\/fastbitlab.com\/?p=4651"},"modified":"2022-11-22T17:20:03","modified_gmt":"2022-11-22T11:50:03","slug":"stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5","status":"publish","type":"post","link":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/","title":{"rendered":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5"},"content":{"rendered":"<div class=\"boldgrid-section\" style=\"background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"container\">\n<div class=\"row\" style=\"padding-top: 50px; padding-bottom: 50px; background-image: linear-gradient(to left, #eeeeee, #eeeeee);\" data-bg-color-1=\"#EEEEEE\" data-bg-color-2=\"#EEEEEE\" data-bg-direction=\"to left\">\n<div class=\"col-md-1 col-sm-12 col-xs-12 col-lg-1\">\n<p>&nbsp;<\/p>\n<\/div>\n<div class=\"col-md-10 col-sm-12 col-xs-12 col-lg-10\">\n<h1 class=\"\" style=\"text-align: center; font-size: 33px; border-width: 0px; line-height: 55px;\"><span style=\"color: #000080;\">I2C IRQ handler implementation Part 5<\/span><\/h1>\n<div class=\"row bg-editor-hr-wrap\" style=\"border-width: 0px; margin-top: -25px;\">\n<div class=\"col-lg-12 col-md-12 col-xs-12 col-sm-12\">\n<div>\n<p>&nbsp;<\/p>\n<div class=\"bg-hr bg-hr-10\" style=\"border-style: solid; border-width: 0px 0px 3px; color: rgba(11, 34, 151, 0.9);\"><\/div>\n<p>&nbsp;<\/p>\n<\/div>\n<\/div>\n<\/div>\n<div class=\"row bg-editor-hr-wrap\">\n<hr>\n<\/div>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.<\/span><\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">When the TXE flag is set, that indicates that the data register is empty, and the software has to put a data byte into the data register to send that data byte to the external world.<\/span><\/p>\n<p class=\"\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 22px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"text-decoration: underline;\"><span style=\"color: #000080;\"><b>Steps to be followed when the TXE flag is set:<\/b><\/span><\/span><\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">When a TXE flag is set, you have to do the data transmission.<\/span><\/li>\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Before starting the data transmission, first, confirm the application\u2019s state. The data transmission must begin only if the application state is busy in TX. Let\u2019s check the application\u2019s state by using the if statement, as shown in Figure 1.<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4653\" aria-describedby=\"caption-attachment-4653\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img fetchpriority=\"high\" decoding=\"async\" class=\"wp-image-4653\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-1-35.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"395\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png 1917w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-300x159.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-768x408.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-1024x544.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-600x319.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-500x266.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-200x106.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-400x213.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-800x425.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35-1200x638.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4653\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 1. Code to check the application\u2019s state.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">If the application\u2019s state is busy in TX, then start the data transmission as follows:<\/span><\/li>\n<\/ul>\n<ul class=\"\" style=\"padding-left: 5em; border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li><span style=\"font-weight: 400; color: #000000;\">First, check whether the length value stored in the TxLen variable is greater than 0 or not (Figure 2).<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4654\" aria-describedby=\"caption-attachment-4654\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\"wp-image-4654\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-2-31.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"419\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31.png 1920w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-300x169.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-768x432.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-1024x576.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-600x338.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-120x68.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-500x281.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-200x113.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-400x225.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-800x450.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-2-31-1200x675.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4654\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 2. Code to check the value of the TxLen variable.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">If the length is greater than zero, then load the data into DR (Figure 3).<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4655\" aria-describedby=\"caption-attachment-4655\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img decoding=\"async\" class=\"wp-image-4655\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-3-31.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"419\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31.png 1920w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-300x169.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-768x432.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-1024x576.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-600x338.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-120x68.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-500x281.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-200x113.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-400x225.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-800x450.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-3-31-1200x675.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4655\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 3. Code to load the data into DR.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Decrement the TxLen variable (Figure 4).<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4656\" aria-describedby=\"caption-attachment-4656\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4656\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-4-27.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"398\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-300x160.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-768x410.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-1024x547.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-600x320.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-500x267.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-800x427.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-4-27-1200x641.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4656\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 4. Code to decrement the TxLen variable.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<ul class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\">\n<li style=\"font-weight: 400;\" aria-level=\"1\"><span style=\"font-weight: 400; color: #000000;\">Increment the buffer address (Figure 5).<\/span><\/li>\n<\/ul>\n<figure id=\"attachment_4658\" aria-describedby=\"caption-attachment-4658\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4658\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-5-21.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"399\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-300x161.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-768x411.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-1024x548.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-600x321.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-500x268.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-800x428.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-5-21-1200x642.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4658\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 5. Code to increment the buffer address.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Whenever the TXE is set, the control will enter into the if statement, shown in Figure 6. If the application\u2019s state is busy in TX and the length is greater than 0, then 1 byte will be transferred to the DR.<\/span><\/p>\n<figure id=\"attachment_4659\" aria-describedby=\"caption-attachment-4659\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4659\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-6-21.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"398\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21.png 1919w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-300x161.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-768x411.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-1024x548.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-600x321.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-500x268.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-800x428.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-6-21-1200x642.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4659\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 6. Handle for the interrupt generated by the TXE flag.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">All the tasks in Figure 6 must be performed only when the device is master. Therefore, before performing these tasks, you should confirm whether the device is master or not. At any point in time, you can ensure the device mode by checking the MSL bit of the status register (Figure 7). If the MSL bit is set, then you can say that the device is behaving as master. Otherwise, the device will be in slave mode. This bit is set by the hardware as soon as the interface is in Master mode (SB=1) and cleared by the hardware after detecting the stop condition on the bus or loss of arbitration or when PE=0.<\/span><\/p>\n<div class=\"mceTemp\"><\/div>\n<figure id=\"attachment_4660\" aria-describedby=\"caption-attachment-4660\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4660\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-7-14.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"375\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14.png 1644w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-300x151.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-768x387.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-1024x516.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-600x302.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-120x60.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-500x252.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-540x272.png 540w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-200x101.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-400x201.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-800x403.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-7-14-1200x604.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4660\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 7. Status register 2.<\/span><\/figcaption><\/figure>\n<p class=\"\">&nbsp;<\/p>\n<p class=\"\" style=\"border-width: 0px; font-family: 'Roboto Slab'; font-weight: 400; font-size: 17px; line-height: 30px;\" data-font-family=\"Roboto Slab\" data-font-weight=\"400\" data-font-style=\"\"><span style=\"font-weight: 400; color: #000000;\">Now let\u2019s check the device mode, as shown in Figure 8.<\/span><\/p>\n<figure id=\"attachment_4661\" aria-describedby=\"caption-attachment-4661\" style=\"width: 744px\" class=\"wp-caption aligncenter\"><img loading=\"lazy\" decoding=\"async\" class=\"wp-image-4661\" src=\"http:\/\/fastbitlab.com\/wp-content\/uploads\/2020\/12\/Figure-8-12.png\" alt=\"I2C IRQ handler implementation Part 5\" width=\"744\" height=\"399\" srcset=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12.png 1917w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-300x161.png 300w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-768x411.png 768w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-1024x549.png 1024w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-600x321.png 600w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-120x64.png 120w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-500x268.png 500w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-200x107.png 200w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-400x214.png 400w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-800x429.png 800w, https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-8-12-1200x643.png 1200w\" sizes=\"(max-width: 744px) 100vw, 744px\" \/><figcaption id=\"caption-attachment-4661\" class=\"wp-caption-text\"><span style=\"color: #000000;\">Figure 8. Modified handle for the interrupt generated by the TXE flag.<\/span><\/figcaption><\/figure>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>&nbsp; I2C IRQ handler implementation Part 5 &nbsp; &nbsp; In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag. When the TXE flag is set, that indicates that the data register is empty, and the software has to put a data byte into the [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":4653,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"ocean_post_layout":"","ocean_both_sidebars_style":"","ocean_both_sidebars_content_width":0,"ocean_both_sidebars_sidebars_width":0,"ocean_sidebar":"0","ocean_second_sidebar":"0","ocean_disable_margins":"enable","ocean_add_body_class":"","ocean_shortcode_before_top_bar":"","ocean_shortcode_after_top_bar":"","ocean_shortcode_before_header":"","ocean_shortcode_after_header":"","ocean_has_shortcode":"","ocean_shortcode_after_title":"","ocean_shortcode_before_footer_widgets":"","ocean_shortcode_after_footer_widgets":"","ocean_shortcode_before_footer_bottom":"","ocean_shortcode_after_footer_bottom":"","ocean_display_top_bar":"default","ocean_display_header":"default","ocean_header_style":"","ocean_center_header_left_menu":"0","ocean_custom_header_template":"0","ocean_custom_logo":0,"ocean_custom_retina_logo":0,"ocean_custom_logo_max_width":0,"ocean_custom_logo_tablet_max_width":0,"ocean_custom_logo_mobile_max_width":0,"ocean_custom_logo_max_height":0,"ocean_custom_logo_tablet_max_height":0,"ocean_custom_logo_mobile_max_height":0,"ocean_header_custom_menu":"0","ocean_menu_typo_font_family":"0","ocean_menu_typo_font_subset":"","ocean_menu_typo_font_size":0,"ocean_menu_typo_font_size_tablet":0,"ocean_menu_typo_font_size_mobile":0,"ocean_menu_typo_font_size_unit":"px","ocean_menu_typo_font_weight":"","ocean_menu_typo_font_weight_tablet":"","ocean_menu_typo_font_weight_mobile":"","ocean_menu_typo_transform":"","ocean_menu_typo_transform_tablet":"","ocean_menu_typo_transform_mobile":"","ocean_menu_typo_line_height":0,"ocean_menu_typo_line_height_tablet":0,"ocean_menu_typo_line_height_mobile":0,"ocean_menu_typo_line_height_unit":"","ocean_menu_typo_spacing":0,"ocean_menu_typo_spacing_tablet":0,"ocean_menu_typo_spacing_mobile":0,"ocean_menu_typo_spacing_unit":"","ocean_menu_link_color":"","ocean_menu_link_color_hover":"","ocean_menu_link_color_active":"","ocean_menu_link_background":"","ocean_menu_link_hover_background":"","ocean_menu_link_active_background":"","ocean_menu_social_links_bg":"","ocean_menu_social_hover_links_bg":"","ocean_menu_social_links_color":"","ocean_menu_social_hover_links_color":"","ocean_disable_title":"default","ocean_disable_heading":"default","ocean_post_title":"","ocean_post_subheading":"","ocean_post_title_style":"","ocean_post_title_background_color":"","ocean_post_title_background":0,"ocean_post_title_bg_image_position":"","ocean_post_title_bg_image_attachment":"","ocean_post_title_bg_image_repeat":"","ocean_post_title_bg_image_size":"","ocean_post_title_height":0,"ocean_post_title_bg_overlay":0.5,"ocean_post_title_bg_overlay_color":"","ocean_disable_breadcrumbs":"default","ocean_breadcrumbs_color":"","ocean_breadcrumbs_separator_color":"","ocean_breadcrumbs_links_color":"","ocean_breadcrumbs_links_hover_color":"","ocean_display_footer_widgets":"default","ocean_display_footer_bottom":"default","ocean_custom_footer_template":"0","ocean_post_oembed":"","ocean_post_self_hosted_media":"","ocean_post_video_embed":"","ocean_link_format":"","ocean_link_format_target":"self","ocean_quote_format":"","ocean_quote_format_link":"post","ocean_gallery_link_images":"off","ocean_gallery_id":[],"footnotes":""},"categories":[8],"tags":[23],"class_list":["post-4651","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-blog","tag-stm32-i2c-lectures","entry","has-media"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.3 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5<\/title>\n<meta name=\"description\" content=\"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5\" \/>\n<meta property=\"og:description\" content=\"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/\" \/>\n<meta property=\"og:site_name\" content=\"FastBit EBA\" \/>\n<meta property=\"article:publisher\" content=\"https:\/\/www.facebook.com\/fastbiteba\/\" \/>\n<meta property=\"article:published_time\" content=\"2020-12-31T04:07:56+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2022-11-22T11:50:03+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png\" \/>\n\t<meta property=\"og:image:width\" content=\"1917\" \/>\n\t<meta property=\"og:image:height\" content=\"1019\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/png\" \/>\n<meta name=\"author\" content=\"FastBitLab\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:creator\" content=\"@fastbiteba\" \/>\n<meta name=\"twitter:site\" content=\"@fastbiteba\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"FastBitLab\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"4 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/\"},\"author\":{\"name\":\"FastBitLab\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#\\\/schema\\\/person\\\/e32b38e733a0d76ffa7e6bc998652e5d\"},\"headline\":\"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5\",\"datePublished\":\"2020-12-31T04:07:56+00:00\",\"dateModified\":\"2022-11-22T11:50:03+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/\"},\"wordCount\":488,\"commentCount\":1,\"publisher\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#organization\"},\"image\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2020\\\/12\\\/Figure-1-35.png\",\"keywords\":[\"STM32 I2C Lectures\"],\"articleSection\":[\"Blog\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/\",\"url\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/\",\"name\":\"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2020\\\/12\\\/Figure-1-35.png\",\"datePublished\":\"2020-12-31T04:07:56+00:00\",\"dateModified\":\"2022-11-22T11:50:03+00:00\",\"description\":\"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.\",\"breadcrumb\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#primaryimage\",\"url\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2020\\\/12\\\/Figure-1-35.png\",\"contentUrl\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2020\\\/12\\\/Figure-1-35.png\",\"width\":1917,\"height\":1019,\"caption\":\"Figure 1. Code to check the application\u2019s state.\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#website\",\"url\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/\",\"name\":\"FastBit EBA\",\"description\":\"Your Online Academy of Embedded Systems\",\"publisher\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#organization\",\"name\":\"FastBit EBA\",\"url\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#\\\/schema\\\/logo\\\/image\\\/\",\"url\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2026\\\/04\\\/logo-EzNrEnyr.png\",\"contentUrl\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/wp-content\\\/uploads\\\/2026\\\/04\\\/logo-EzNrEnyr.png\",\"width\":640,\"height\":640,\"caption\":\"FastBit EBA\"},\"image\":{\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#\\\/schema\\\/logo\\\/image\\\/\"},\"sameAs\":[\"https:\\\/\\\/www.facebook.com\\\/fastbiteba\\\/\",\"https:\\\/\\\/x.com\\\/fastbiteba\",\"https:\\\/\\\/www.linkedin.com\\\/in\\\/fastbit-embedded-brain-academy-b3167b124\\\/\",\"https:\\\/\\\/www.youtube.com\\\/channel\\\/UCa1REBV9hyrzGp2mjJCagBg\"]},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/fastbitlab.com\\\/blog\\\/#\\\/schema\\\/person\\\/e32b38e733a0d76ffa7e6bc998652e5d\",\"name\":\"FastBitLab\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g\",\"url\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g\",\"contentUrl\":\"https:\\\/\\\/secure.gravatar.com\\\/avatar\\\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g\",\"caption\":\"FastBitLab\"},\"description\":\"The FastBit Embedded Brain Academy uses the power of internet to bring the online courses related to the field of embedded system programming, Real time operating system, Embedded Linux systems, etc at your finger tip with very low cost. Backed with strong experience of industry, we have produced lots of courses with the customer enrolment over 3000+ across 100+ countries.\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5","description":"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/","og_locale":"en_US","og_type":"article","og_title":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5","og_description":"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.","og_url":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/","og_site_name":"FastBit EBA","article_publisher":"https:\/\/www.facebook.com\/fastbiteba\/","article_published_time":"2020-12-31T04:07:56+00:00","article_modified_time":"2022-11-22T11:50:03+00:00","og_image":[{"width":1917,"height":1019,"url":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png","type":"image\/png"}],"author":"FastBitLab","twitter_card":"summary_large_image","twitter_creator":"@fastbiteba","twitter_site":"@fastbiteba","twitter_misc":{"Written by":"FastBitLab","Est. reading time":"4 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#article","isPartOf":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/"},"author":{"name":"FastBitLab","@id":"https:\/\/fastbitlab.com\/blog\/#\/schema\/person\/e32b38e733a0d76ffa7e6bc998652e5d"},"headline":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5","datePublished":"2020-12-31T04:07:56+00:00","dateModified":"2022-11-22T11:50:03+00:00","mainEntityOfPage":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/"},"wordCount":488,"commentCount":1,"publisher":{"@id":"https:\/\/fastbitlab.com\/blog\/#organization"},"image":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#primaryimage"},"thumbnailUrl":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png","keywords":["STM32 I2C Lectures"],"articleSection":["Blog"],"inLanguage":"en-US","potentialAction":[{"@type":"CommentAction","name":"Comment","target":["https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#respond"]}]},{"@type":"WebPage","@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/","url":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/","name":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5","isPartOf":{"@id":"https:\/\/fastbitlab.com\/blog\/#website"},"primaryImageOfPage":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#primaryimage"},"image":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#primaryimage"},"thumbnailUrl":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png","datePublished":"2020-12-31T04:07:56+00:00","dateModified":"2022-11-22T11:50:03+00:00","description":"I2C IRQ handler implementation Part 5. In this article, let\u2019s discuss the creation of the handle for the interrupt generated by the setting of the TXE flag.","breadcrumb":{"@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#primaryimage","url":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png","contentUrl":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2020\/12\/Figure-1-35.png","width":1917,"height":1019,"caption":"Figure 1. Code to check the application\u2019s state."},{"@type":"BreadcrumbList","@id":"https:\/\/fastbitlab.com\/blog\/stm32-i2c-lecture-48-i2c-irq-handler-implementation-part-5\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/fastbitlab.com\/blog\/"},{"@type":"ListItem","position":2,"name":"STM32 I2C Lecture 48: I2C IRQ handler implementation Part 5"}]},{"@type":"WebSite","@id":"https:\/\/fastbitlab.com\/blog\/#website","url":"https:\/\/fastbitlab.com\/blog\/","name":"FastBit EBA","description":"Your Online Academy of Embedded Systems","publisher":{"@id":"https:\/\/fastbitlab.com\/blog\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/fastbitlab.com\/blog\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/fastbitlab.com\/blog\/#organization","name":"FastBit EBA","url":"https:\/\/fastbitlab.com\/blog\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/fastbitlab.com\/blog\/#\/schema\/logo\/image\/","url":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2026\/04\/logo-EzNrEnyr.png","contentUrl":"https:\/\/fastbitlab.com\/blog\/wp-content\/uploads\/2026\/04\/logo-EzNrEnyr.png","width":640,"height":640,"caption":"FastBit EBA"},"image":{"@id":"https:\/\/fastbitlab.com\/blog\/#\/schema\/logo\/image\/"},"sameAs":["https:\/\/www.facebook.com\/fastbiteba\/","https:\/\/x.com\/fastbiteba","https:\/\/www.linkedin.com\/in\/fastbit-embedded-brain-academy-b3167b124\/","https:\/\/www.youtube.com\/channel\/UCa1REBV9hyrzGp2mjJCagBg"]},{"@type":"Person","@id":"https:\/\/fastbitlab.com\/blog\/#\/schema\/person\/e32b38e733a0d76ffa7e6bc998652e5d","name":"FastBitLab","image":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/secure.gravatar.com\/avatar\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g","url":"https:\/\/secure.gravatar.com\/avatar\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/9230d0f9bdef28b63a01e7ca274ee7b2e8ed9abe932ee564af8809caaf52a0c8?s=96&d=mm&r=g","caption":"FastBitLab"},"description":"The FastBit Embedded Brain Academy uses the power of internet to bring the online courses related to the field of embedded system programming, Real time operating system, Embedded Linux systems, etc at your finger tip with very low cost. Backed with strong experience of industry, we have produced lots of courses with the customer enrolment over 3000+ across 100+ countries."}]}},"_links":{"self":[{"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/posts\/4651","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/comments?post=4651"}],"version-history":[{"count":5,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/posts\/4651\/revisions"}],"predecessor-version":[{"id":12579,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/posts\/4651\/revisions\/12579"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/media\/4653"}],"wp:attachment":[{"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/media?parent=4651"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/categories?post=4651"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/fastbitlab.com\/blog\/wp-json\/wp\/v2\/tags?post=4651"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}