I2C transfer sequence diagram for slave transmitter

Transfer Sequence Diagram for Slave Transmitter (7-bit)

Steps to send the data from slave to master:

1. Initiation of Read Transaction by the Master.

2. Master Generates the Start Condition (S)

3. Master is going to generate the address phase (Address).

4. During the Address Phase, Slave Sends ACK (A), Triggering Event EV1:

• EV1 signifies the setting of the ADDR flag (ADDR = 1), indicating an address match.
• For the master, EV1 denotes an address sent event; for the slave, it’s an address matched event.
• ADDR flag sets the clock low, and the master waits for the slave to release it, cleared by software.

5.After ADDR flag clears, Event EV3-1 Occurs:

• EV3-1 sets the TXE flag (TXE = 1), indicating empty shift/data registers and stretched SCL to prevent underrun.
• TXE flag also enables data loading into the register for transmission.

6. The master sends an ACK after receiving the data from the slave to indicate that the master wants one more data. That’s why the slave sends more data and receives ACK from the master, as shown in Figure 1.

7. Remember that the EV3 happens after receiving the ACK. That means the TXE flag will be set only if the master ACKs successfully. Otherwise, the TXE will not be set.

8.Master Sends NACK (NA) for the Last Data Byte, Resulting in Event EV3-02:

• EV3-02 signifies AF = 1 (Acknowledgment Failure).

9. Master generates the stop condition (P).

Whenever the slave receives NACK, that’s an indication for the slave to stop sending more data to the master, and the slave must conclude the end of data transfer to the master.

Remember that whenever the slave is transmitting, the ACK failure is the end of the data transfer.

Transfer Sequence Diagram for Slave Receiver (7-bit)

Steps:

1. In the slave receiver, the master has to generate the write transaction.

2. Master first generates the start condition.

3. Master generates the address phase.

4.The ADDR is set to 1, and the clock will be stretched.

5. The moment the slave clears the ADDR flag, the data will be received from the master.

6. Slave ACKs for the data received.

7.Once the slave sends ACK, the EV2 will be set. EV2 is nothing but the setting of RXNE to 1.

8. When EV2 occurs, the driver should send the event to the application saying one byte is ready.

9. The software reads the data.

10. When the master receives the last byte, the slave sends ACK, and the event EV2 occurs. At the same time, the stop condition is generated by the master to indicate that it doesn’t want more data.

Once the master generates the stop condition, the EV4 happens. The EV4 is nothing but the detection of the stop. That means the stop flag will be set to 1.

The STOPF=1 is an indication for the slave that the master has ended the write transaction. If the slave detects the stop flag while receiving the data, then it is an end of data reception for the slave.

Also, note that the STOPF flag sets only in slave receiver mode but not in slave transmitter mode. The STOPF is not applicable to the master.

When a slave is transmitting data, the stop flag doesn’t appear. Look at Figure 1. There is no stop flag mentioned in that. Therefore, in the slave transmitter, AF=1 is an indication of the end of the slave transmitting the data.

Events and Actions Summary:

• EV1: Address Match Event. ADDR flag set by slave when address matches, clock stretched.
• EV3-1: TXE Flag Set, Indicates Data Ready for Transmission.
• EV3: Data Ready for Transmission, Occurs After Master Acknowledges.
• EV3-02: AF = 1 (Acknowledgment Failure), Master Sends NACK.
• EV4: STOPF = 1 (Stop Detection), Indicates End of Data Reception in Slave Receiver.

Different events and actions to be taken when they occur are listed as follows:

In the following article, let’s explore the topic I2C slave support in driver. 

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