STM32 I2C Lecture 47: I2C IRQ handler implementation Part 4

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I2C IRQ handler implementation Part 4

 

Now let’s code for the STOP flag shown in Figure 1.

I2C IRQ handler implementation Part 4
Figure 1. Handle for the interrupt generated by the STOPF event.

 

The master will not execute the if block in Figure 1 since the STOP flag will not be set in the master mode. That means this if block will only get executed in the slave mode.

Why do the stop flag sets?

In the reference manual (Figure 2), it is given that the stop detection is only applicable to slave mode. If the STOP flag is 0, then no stop condition is detected. This bit is set by the hardware when a stop condition is detected on the bus by the slave after an acknowledgement, and the software clears it after reading the SR1 register followed by writing into the CR1 register (Figure 3).

I2C IRQ handler implementation Part 4
Figure 2. Reference manual.

 

I2C IRQ handler implementation Part 4
Figure 3. Procedure to clear the STOP bit.

 

Observe Figure 1. In the code, the STOP flag is set, and you have to clear it.

Procedure to clear the STOP flag:

  • Read the SR1 register (Figure 4).
I2C IRQ handler implementation Part 4
Figure 4. Code to read the SR1 register.

 

  • Write to the CR1 register (Figure 5): While writing data to the CR1, make sure that you don’t write any invalid data; otherwise, the peripheral will not work properly. Just do bitwise OR with 0X0000 so that the contents of the CR1 will not get affected.
I2C IRQ handler implementation Part 4
Figure 5. Code to write to the CR1 register.

 

  • Call I2C application event callback to notify the application about the stop generation (Figure 7). Let’s call the application callback function, as shown in Figure 8, and for this function, you have to mention the handle and the app event.
I2C IRQ handler implementation Part 4
Figure 6. Call for I2C_ApplicationEventCallback() function.
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